Semiconductor Engineering

Hardware-Software Co-Design In The AI Era

Even though the benefits are accepted, a combined hardware/software development flow is hampered by a lot of challenges.
Semiconductor Engineering

AI Data Centers Have A Power Hoarding Problem

Data centers are notorious energy consumers. On the one hand, ongoing efforts attempt to reduce electronics power to keep overall power from growing. On the other hand, data centers are provided with ...
Semiconductor Engineering

AMBA Over UCIe: Building Coherent Multi-Die Systems

Transforming established SoC design paradigms into system-level fabrics capable of supporting next-generation AI, HPC, and data center workloads.
Semiconductor Engineering

Scaling Thermal Analysis From Transistors To Data Centers

Rising power density and chiplet complexity drive thermal considerations earlier in the design process. Thermal is becoming an architectural constraint, requiring trade-offs in power, performance, ...
Semiconductor Engineering

Scaling AI Infrastructure With PCIe Switches And Retimers

Build configurable PCIe subsystems spanning local expansion, shared resource domains, and longer-reach topologies.
Semiconductor Engineering

One Processor, One Toolchain

One toolchain means one team. The DSP specialists, the ML engineers, and the firmware developers work in the same environment ...
Semiconductor Engineering

Validating PCIe 6.0 Connectivity In A 3D Multi-Die Test Chip

Synopsys’ 3D PCIe 6.0 test-chip demonstration shows that 64.0 GT/s PCIe connectivity, with up to 128.0 GB/s delivered through an 8-lane configuration using PAM4 signaling, can be implemented and ...